Introduce引言

澳大利亞證券和投資委員會(ASIC)目前正在調查位于昆士蘭的兩家企業，因為這兩家企業涉嫌利用他們的價值和地位誤導投資者進行非法投資。在此種情形下，Royale Capital Pty Ltd (Royale) 有限公司和Super Pty Ltd (Active)有限公司，在2010到2012年份之間，一直被指控有誤導消費者的嫌疑。目前為止，ASIC發現兩家公司募集了超過475萬美元的非法來自200多個投資者的資金。2013年3月,澳大利亞聯邦法院命令,任命羅伯特·格雷厄姆和邁克爾·杰拉德麥肯作為MOGS有限公司聯合臨時清盤人。根據ASIC澳大利亞證券和投資委員會的調查,Royale Capital Pty Ltd (Royale) 有限公司和Super Pty Ltd (Active)有限公司的客戶可能是被暗中操控和誤導,兩家公司一直致力于鼓勵他們的客戶建立自我管理的養老基金(SMSFs)。這兩家公司接著指使客戶投資很多金融性產品。例如,他們被鼓勵投資不良金融產品（美利堅合眾國的金融產品,這些產品的信息匱乏，不夠透明。）

The Australian Securities and investments commission (ASIC) is currently investigating two corporations based in Queensland accused of misleading their investors about the value and status of their investments. In this case, Royale Capital Pty Ltd (Royale) and Active Super Pty Ltd (Active) have been accused of misleading their investors between 2010 and 2012. So far, ASIC has found that the two companies raised more than $4.75 million illegally from more than 200 investors by misleading them during the period. In March 2013, the federal court of Australia made orders to appoint Robert Graham Killer of Grant Thornton and Michael Gerrard McCann as the joint provisional liquidators to MOGS Ltd. This was after a hearting in which ASIC had filed a court petition accusing the two companies of acting against the federal corporate law that requires corporations to disclose the status and value of their shares and equities to their prospective and current investors. The two companies, which are based in Queensland, were notified of their investigations on November 2011.

 

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According to ASIC, the clients of Royale and Active may have been cold called and misled when the two companies encouraged their clients to set up self-managed superannuation funds (SMSFs). The two companies then went on to make the clients invest in a number of things. For instance, they were encouraged to invest in distressed [properties in the United States of America, with the information involving the statuses of these properties largely lacking. ASIC argues that the investment in the American properties was being conducted through LLC companies based in the United States.

 

In addition, ASIC has alleged that Active and Royale had not obtained any authority to offer their shares in the LLC companies to the funds as required by the corporations Act of Australia. Moreover, the authority also alleges that both companies offered investments to the funds as an enticement to purchase shares in SPG and WPO, but the appropriate document of disclosure was not lodged with ASIC. Moreover, there are concerns in the way these investors were misled and deceived about the actual status and nature of the funds and the American companies. So far, ASIC investigations have shown that money subscribed to the American LLC companies, SPG and WPO may have been provided to MOGS in form of a long-term loan provided to meet its daily operations. In addition, ASIC has accused the two companies of failing to inform their clients on the actual status of the investments after it was found that Cayco was the investment manager of both SPG and WPO at the time of investments. ASIC alleges that Cayco was aware that funds ought to have been received by WPO and SPG from the SMF funds when investing in real estates.#p#分頁標題#e#

 

Investigations have shown that at the time of this malpractice, Admson, who is actually a partner with Clamenz Evans Ellis law firm, acted as a director both at Cayco and MOGS. ASIC has found that most of the properties were purchased in Arizona, but a large chunk of them has been sold. As the investigation continues ASIC hopes to find other important information about the case. For instance, ASIC is investigating the conduct of the defendants such as those who had the control of sale and proceedings from sales in the properties bought in Arizona before they were sold off.

 

ASIC is divided into full custom and half a custom. Full custom design needs the designer to complete all the design of the circuit, so we need a large number of manpower material resources, has great flexibility but a low development efficiency. If the design ideal, all custom can than half custom ASIC chip faster. Half a custom use database Standard logic cells, Cell), when the design can choose from Standard logic unit library SSI (gate), MSI (e.g., adder, comparator, etc.), data path (such as ALU, memory, bus, etc.), storage, and even system level module (such as a multiplier, microcontroller, etc.) and IP core, the logical unit is layout, and design more reliable, designers can easily complete the system design. Modern ASIC often contain the entire 32 - bit processor, a similar block ROM, RAM, EEPROM, Flash storage unit and other modules. This ASIC is often referred to as the SoC (system on a chip). 

 

FPGA are Cousins of the ASIC, generally through the schematic diagram of digital system modeling, VHDL, using EDA software simulation, synthesis, generate tables, based on some of the standard library network configuration to chip can be used. Users do not need to step in is the difference between it and ASIC chip layout and process problems, and can change at any time the logic function, the use of flexible. 

 

ASIC design method and means has experienced decades of development, from the initial hand design development to the present advanced can be fully automatic process. This is also a science and technology in recent decades, especially the result of the development of electronic information technology. From the design means the process of evolution, design means has experienced the manual design, computer aided design (ICCAD), electronic design automation EDA, electronic system design automation ESDA and user field programmable phase. Integrated circuit to make on the prototype for only a few hundred microns thick wafers, each wafer can accommodate hundreds or even thousands of tube core. Transistors and attachment depending on the complexity of integrated circuit can be made up of many layers, the most complex process by about six in the bowels of the silicon wafer diffusion layer or layer ion implantation, and 6 layer on the surface of the silicon layer of attachment. In terms of design method, the design method of integrated circuit can be divided into full customization, customization and programmable IC design three ways. #p#分頁標題#e#

 

Full custom ASIC is the use of the basic design method of integrated circuit (do not use the existing library units), seiko spy on all the components in the integrated circuit design method. Full custom design can achieve minimum size, best wiring layout and the optimal consumption speed product, get the best electrical properties. This method is especially suitable for analog circuit, mixed-signal circuit as well as to the speed, power consumption, tube core area and other device features (such as linearity, symmetry, current capacity, pressure, etc.) have special requirements of occasions; Or in the absence of off-the-shelf components library. Features: seiko spy, design requirement is high, the cycle is long, the design is expensive.  

 

Due to the increasingly mature cell library and function module circuit, full custom design method is replaced by half a custom method. In the present IC design, the whole circuit adopts full custom design is less and less. Full custom design requirements: full custom design to consider process conditions, depending on the type of complex and difficult decision device process circuit, wiring layer, material parameters, process method, limit, yield and other factors. Need to experience and skills, master the design rules and methods, are usually performed by microelectronics IC design professionals; Conventional design can draw lessons from the past, some devices need according to the electrical characteristics separate design; Layout, wiring, combination of typography, all need to repeatedly adjusted according to the size of the best and most reasonable layout, the design principles, such as the shortest, the most convenient attachment pin design layout. Landscape design and process related, should fully understand the process specification, in accordance with the requirements of process parameters and the reasonable design layout and process. The method adopts the design good referred to as the standard unit of logical units in advance, such as gate, multi-channel switch, trigger, clock generator, etc., are arranged in array according to certain rules, into a semiconductor gate array or substrate, and then according to the circuit function and the request using the mask the required logic unit connection into the application-specific integrated circuit.  

 

Unit in the library all standard unit by adopting the method of custom design in advance, as well as building blocks or build by laying bricks or stones wall pieced together, usually arranged in accordance with the principle of high range wide, leave width adjustable wiring channel. Main advantages and disadvantages of CBIC: ※ with advance design, test in advance booking features standard cell library, save time, save money, less risk for ASIC design tasks. Does the designers need to determine the standard cell layout, and interconnection of the CBIC. Does standard unit can be placed in any position of the chip. Does all the mask layer is custom; Does can inline custom function unit; Does manufacturing cycle is short, development cost is not too high. Does need to spend money to buy or own design standard cell library; Does it takes more time to interconnect design of the mask layer. #p#分頁標題#e#

 

ASIC IS empowered by two sections of the Australian company law. The corporations act 2001 and Australian securities and investments commission act of 2001 empowers ASIC to investigate the roles and practices of companies and thereafter apply administrative sanctions if it finds a company guilty of malpractice. Such sanctions may significantly affect both companies as well as individuals involved in any form of malpractice.

 

Under these acts, ASIC has the role of promoting a stable as well as a secure financial system in Australia by ensuring that the regulated corporations and individuals comply with the legislations. In addition, it seeks to protect clients, investors and consumers from suffering from the misconduct that may be perpetrated by corporations. However, before sanctions are made, ASIC is require by the law to investigate the suspected companies and come up with a comprehensive report that can be tabled in court as evidence. The two acts then require ASIC to seek criminal and civil sanctions from the courts of law against the accused company or individual. Thus, under the law, ASIC has the powers to conduct investigations, gather information and conduct hearings.

 

Conclusion結論

 

So far, it is evident that the corporation law and other regulations are sufficient enough for ASIC to successfully investigate and make corporate and individuals liable. It is worth noting that both Acts have vested a lot of powers on ASIC in order to enable it control corporate behavior. However, it is quite clear that ASIC faces a number of challenges when doing investigations, given that it has to produce solid evidence in court (Nehme 2010). It is often difficult to investigate companies because they tend to sophisticate their practices, concealing evidence and ensuring that minimum information is leaked (Nehme, Hyland & and Adams 2011). Therefore, to improve the roles of ASIC, it is important to ensure than adequate statutory safeguards are in place to ensure that ASIC, as a regulator, is publicly accountable.

 

Reference文獻

 

Australian Securities and Investments Commission Act 2001 (Cth) ss 93AA , 93A.

Nehme, M, 2010 “Enforceable Undertakings in Australia and Beyond”, Australian Journal of Corporate Law vol. 1.

Nehme, M, Hyland M & and Adams, M, 2011, “Enhancement of Continuous Disclosure” Australian Journal of Corporate Law, vol. 121.